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@@ -11941,8 +11941,11 @@ movq |$\itm{rhs}'$|, |$8(n+1)$|(%r11)
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\fi}
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\end{minipage}
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\end{center}
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-The $\itm{lhs}'$, $\itm{tup}'$, and $\itm{rhs}'$ are obtained by
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-translating $\itm{tup}$ and $\itm{rhs}$ to x86. The move of $\itm{tup}'$ to
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+\racket{The $\itm{lhs}'$, $\itm{tup}'$, and $\itm{rhs}'$}
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+\python{The $\itm{tup}'$ and $\itm{rhs}'$}
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+are obtained by translating from \LangCVec{} to x86.
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+%
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+The move of $\itm{tup}'$ to
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register \code{r11} ensures that offset expression
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\code{$-8(n+1)$(\%r11)} contains a register operand. This requires
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removing \code{r11} from consideration by the register allocating.
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@@ -11952,7 +11955,6 @@ Why not use \code{rax} instead of \code{r11}? Suppose we instead used
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\begin{lstlisting}
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movq |$\itm{tup}'$|, %rax
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movq |$\itm{rhs}'$|, |$8(n+1)$|(%rax)
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-movq $0, |$\itm{lhs}'$|
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\end{lstlisting}
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Next, suppose that $\itm{rhs}'$ ends up as a stack location, so
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\code{patch\_instructions} would insert a move through \code{rax}
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@@ -11961,7 +11963,6 @@ as follows.
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movq |$\itm{tup}'$|, %rax
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movq |$\itm{rhs}'$|, %rax
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movq %rax, |$8(n+1)$|(%rax)
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-movq $0, |$\itm{lhs}'$|
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\end{lstlisting}
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But the above sequence of instructions does not work because we're
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trying to use \code{rax} for two different values ($\itm{tup}'$ and
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Jeremy Siek