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@@ -115,7 +115,11 @@ Where:
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* `Offset` - is offset to entry point of an interrupt handler;
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* `Offset` - is offset to entry point of an interrupt handler;
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* `DPL` - Descriptor Privilege Level;
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* `DPL` - Descriptor Privilege Level;
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* `P` - Segment Present flag;
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* `P` - Segment Present flag;
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-* `Segment selector` - a code segment selector in GDT or LDT
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+* `Segment selector` - a code segment selector in GDT or LDT (actually it always point to GDT in linux)
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+```C
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+#define __KERNEL_CS (GDT_ENTRY_KERNEL_CS*8) // 0000 0000 0001 0000
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+#define GDT_ENTRY_KERNEL_CS 2
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+```
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* `IST` - provides ability to switch to a new stack for interrupts handling.
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* `IST` - provides ability to switch to a new stack for interrupts handling.
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And the last `Type` field describes type of the `IDT` entry. There are three different kinds of gates for interrupts:
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And the last `Type` field describes type of the `IDT` entry. There are three different kinds of gates for interrupts:
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@@ -164,7 +168,7 @@ where `NUM_EXCEPTION_VECTORS` expands to `32`. As we can see, We're filling only
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and inserts an interrupt gate to the `IDT` table which is represented by the `&idt_descr` array.
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and inserts an interrupt gate to the `IDT` table which is represented by the `&idt_descr` array.
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-The `early_idt_handler_array` array is declaredd in the [arch/x86/include/asm/segment.h](https://github.com/torvalds/linux/blob/master/arch/x86/include/asm/segment.h) header file and contains addresses of the first `32` exception handlers:
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+The `early_idt_handler_array` array is declared in the [arch/x86/include/asm/segment.h](https://github.com/torvalds/linux/blob/master/arch/x86/include/asm/segment.h) header file and contains addresses of the first `32` exception handlers:
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```C
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```C
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#define EARLY_IDT_HANDLER_SIZE 9
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#define EARLY_IDT_HANDLER_SIZE 9
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